Engineering

So, after much rummaging about I have got this bastard long-running project to a state where it's worth taking it to the customer and plugging it into their mass spectrometer hardware, where it's basically going to be responsible for controlling the timing, driving various electrostatic lenses and acquiring data.

The design has an FPGA containing a reduced version of the R3220 (my custom 32-bit RISC processor) and about a dozen custom peripherals, it's running a fairly complicated embedded application (written entirely in assembler) consisting of 33 source files and the damned thing is responsible for some fairly hairy real-time data acquisition in a noisy environment.

As well as the device itself there are various development tools that have been written to support the design, all in all some tens of thousands of lines of code. All of which had to work and none of which had actually been tested on the machine.

And to cut to the chase, after we'd set some parameters (there are thirty-odd interface registers to play with up) and I'd restored a couple of lines that had been accidentally edited to death, it was controlling the hardware and we were looking at mass peaks... In other words, nearly everything worked first time, and the bit that didn't just required a few seconds of editing to fix.

The thing is, a programmer would regard writing so much code, and in assembler, and having it work virtually straight away as success beyond their wildest dreams, if not as being completely impossible. Me? I'm actually slightly pissed off - if I hadn't made a tired mistake tidying up a file (unnecessarily, at that) the bloody thing would have been right first time... As usual. Bugger!

Still, given that the processor was designed in only ten days and it's lovely to use, is kicking the shit out of a Nios2 performance wise and has behaved perfectly I suppose I'm allowed a small cackle of victory.

Mu-haha! MU-ha-ha-ha-oh... Sorry. Bit carried away there.

[Update on the "kicking the shit out of a Nios2" comment.

The R3220 (clocked at 30MHz) is handling more data in 5uS than the Nios2 (clocked at 70MHz) managed to handle in 80uS, so as far as the application goes the R3220 is a factor of 36 times faster, or so.

Much of this performance margin is down to the efficiency of the code they are running, of course, thought it should be noted that the Nios2 was running highly optimised C, code that was written and tweaked over a period of months. The R3220 is running hand assembler written over a period of hours and not optimised at all - there was no need.

The Nios2 system also had a lot of hardware support for functions that the R3220 system just does in software, because it can, so the performance factor is arguably higher even than that...]